Korean Breakthrough Controls Where AI Chips Grow
A KAIST-led team published a Nature paper describing a technique that controls not just where a 2D semiconductor grows, but exactly where its crystal nucleation begins. The implications for 3D AI chip stacking are significant.
The Missing Link in 2D Semiconductor Manufacturing
A paper published in Nature this week describes a semiconductor fabrication technique that is simultaneously more mundane and more consequential than its headlines suggest. The Korean research team at KAIST, UNIST, Hanyang University, and TDS Innovation demonstrated control over where a 2D crystal nucleates — not merely where it grows, but precisely where it begins to grow. That distinction matters.
The material in question is molybdenum disulfide (MoS₂), a two-dimensional semiconductor that has drawn intense interest as a candidate for beyond-silicon logic. The problem has always been defect management. When a crystal nucleus forms at an arbitrary point inside a defined growth zone, neighboring crystals collide and create grain boundaries. Those boundaries scatter electrons and degrade performance. The industry has known this for years. What the Nature paper addresses is the nucleation-position problem, which has been largely uncontrolled until now.
How the Technique Works
The team used hafnium oxide (HfO₂) barriers surrounding each growth pattern. These barriers release a chemical etching flux — essentially a reactive gas — into the immediate vicinity. That flux suppresses nucleation at the edges of the growth zone. What remains is the center, where the etching effect is weakest, and where a single nucleus can form without competition.
The results were striking: 99 percent or better single-crystal formation across 400 test patterns. Single crystals grew up to 10 micrometers in size — large enough to be practically useful. The field-effect mobility reached 117 cm²/V·s, and the relative standard deviation in device-to-device performance was held to 7.8 percent. Those numbers are competitive for a laboratory demonstration in 2D semiconductors, though the gap between controlled lab patterns and factory-floor wafers remains significant.
The researchers also demonstrated heterostructures — laterally joining MoS₂ and molybdenum selenide (MoSe₂) — showing the technique is not limited to a single material system. That expands the relevance: 2D heterostructures are a key enabler for integrating different semiconductor functionalities on the same plane.
Why Nucleation Control Matters for AI Chips
The broader context is the push toward three-dimensional semiconductor integration. The most promising path to higher AI throughput without proportional power growth involves stacking logic and memory vertically, reducing the distance data travels between computation and storage. But every new layer introduces new defects unless the underlying material is near-perfect. Grain boundaries in a multilayer stack multiply problems rather than solve them.
Monocrystalline 2D semiconductors grown at controlled positions could alleviate that constraint. A single crystal per unit cell means uniform electrical characteristics across the device. It also means that when you stack additional layers, you are not aligning misoriented grains but building on a known, consistent substrate. The yield impact in a high-volume Fab is hard to quantify today, but the direction of travel is clear.
The team did not claim a production-ready process. Scaling to larger wafers, adapting the technique to finer circuit patterns, lowering processing temperatures, and developing industrial-scale deposition equipment are all identified as necessary next steps by the researchers themselves. That is honest framing, and it is worth noting separately from the usual pattern of academic press releases over-selling near-term applicability.
The Commercial Vehicle: TDS Innovation
The university work is one thing. The commercial pathway is another. TDS Innovation, founded in 2024 as a KAIST spinout, is building the equipment and process stack needed to move this from paper to fab. The company uses a proprietary crystal layer deposition (CLD) technique integrated with metalorganic chemical vapor deposition (MOCVD) tools, and it develops both the precursors and the process itself rather than relying on existing semiconductor equipment platforms.
TDS Innovation has been selected as a top-ten entrant in a global equipment company technology competition and is registered under South Korea’s TIPS deep-tech support program. Neither designation is trivial, but neither guarantees market success. The company’s target — 3D-integrated logic devices using 2D semiconductors as channel materials — is ambitious and sits in a crowded field of startups and incumbents pursuing the same destination through different routes.
Who Wins, Who Loses
If this nucleation-control approach matures into a manufacturable process, the winners are companies already investing in 2D semiconductor integration: Samsung Electronics, SK hynix, and the foundry ecosystem that would need to accommodate new deposition and alignment steps. Foundries that remain silicocentric lose relative positioning, because the cost advantage shifts toward processes that avoid the most expensive EUV lithography nodes for certain logic functions.
The losers in the near term are the equipment vendors whose current product roadmap does not account for 2D selective nucleation steps. MOCVD toolmakers will need to adapt or cede ground. So will companies whose process intellectual property is built on conventional silicon-on-insulator or finFET growth paradigms.
Globally, the significance extends beyond Korea. The technique is published in Nature and is open to replication. If other groups — at TSMC, Intel, or academic labs in Japan, Europe, or the United States — adopt and extend the approach, the competitive advantage of the originating team narrows quickly. The patent landscape will determine who captures value, not who publishes first.
What to Watch Next
Three indicators will signal whether this moves from promising paper to commercial reality:
First, whether TDS Innovation demonstrates the technique on wafers larger than the current lab-scale patterns, and at what defect density.
Second, whether any major fabricator announces a pilot line incorporating 2D semiconductor channel layers grown via nucleation-controlled methods.
Third, whether the consortium expands the technique beyond MoS₂ and MoSe₂ to other 2D materials (WS₂, black phosphorus, transition metal dichalcogenide alloys) that have different electronic properties suited to analog, RF, or memory applications.
The Nature paper establishes a capability that the semiconductor industry has lacked for years: deterministic control over where a crystal starts. The next phase — scaling that control to volume manufacturing — is where the real question lies.