The Non-China Chip Alliance Just Built a Wall Around China

The Real Weapon Isn’t a Machine — It’s a Standard

Last week, ASML, Intel, TSMC, and Samsung each announced plans to adopt High-NA EUV lithography. On the surface, this looks like routine corporate scheduling — different timelines, different product lines, same underlying technology. But look closer and the shape of something new emerges.

These four companies are not simply buying ASML’s most advanced scanner. They are co-designing the manufacturing ecosystem around it. That includes photomasks, the stencils used to print circuits onto wafers. Specifically, they are moving the industry from 6-inch masks to 12-inch masks — a switch so fundamental that it requires retooling inspection equipment, handling systems, storage, and factory floor layouts. ASML estimates this change alone could boost High-NA production output by roughly 40 percent.

This is not procurement. This is standard-setting. And it is deliberately exclusive.

Why Now

The timing is impossible to ignore. A month before these announcements, China began mass-producing its own immersion DUV lithography equipment — a technology ASML commercialized in the mid-to-late 2000s. Huawei was reported to be investing directly in DUV domestication. ASML’s stock dropped over 8 percent in a single day on the news.

China’s approach has been straightforward: acquire whatever advanced equipment sanctions allow, then reverse-engineer and localize what it cannot. The immersion DUV strategy makes sense within that logic. But the non-China quartet has simply moved the goalposts.

While China races to catch up to existing EUV, the alliance is already building the next wall — High-NA EUV, plus the 12-inch mask infrastructure that makes it viable at volume. By the time China cracks EUV, it will face a platform it cannot easily replicate because the entire supporting ecosystem — mask makers, equipment suppliers, fab layouts — has already committed to a different standard.

The gap is now measured in generations, not years.

The Timeline

Intel is furthest along. It has already shipped products made with High-NA EUV at its 18A node and reports more than one million wafers processed. It has been working with ASML for over three years on the 12-inch mask transition.

Samsung has committed to introducing High-NA EUV into advanced DRAM production by 2028 — the first in the industry to do so with memory. Industry watchers expect the initial application to be 0a-class DRAM, the first generation below 10 nanometers, with volume ramp likely in late 2027 or early 2028.

TSMC has committed to High-NA EUV for advanced logic production starting in 2030, with a pilot line for 12-inch masks targeted for 2031 and full High-NA production systems in place by 2033.

SK Hynix, notably, did not issue a separate joint statement with ASML. It confirmed to Reuters that it is evaluating participation in the 12-inch mask consortium and is targeting High-NA EUV for DRAM production around 2028 — roughly in step with Samsung but without the same public coordination.

The asymmetry is telling. Samsung and Intel are signaling deeper integration with ASML. SK Hynix is watching from the periphery. China is outside the circle entirely.

The Deeper Split

For decades, the semiconductor industry operated on the assumption that technology would diffuse globally — that every fab, every foundry, every national program would eventually access the same tools and follow the same process nodes. Export controls have eroded that assumption, but the non-China alliance is doing something more structural: it is creating a parallel manufacturing standard.

A 12-inch photomask is not simply a bigger version of a 6-inch mask. The lithography optics, the defect inspection instruments, the vacuum handling robots, the cleanroom workflows — all of it has to be redesigned. Companies that invest in this ecosystem lock in advantages for a decade. Companies that do not are locked out.

China currently lacks access to EUV equipment altogether, let alone High-NA systems. Its domestic lithography efforts remain focused on immersion DUV. Even if China achieves EUV breakthroughs within the next five to seven years — a significant uncertainty — it would still face a fab infrastructure built around 6-inch masks and legacy process flows, while the leading foundries have already transitioned to 12-inch platforms.

Who Wins, Who Loses

The winners are clear: ASML, which gains a captive ecosystem of the world’s largest chipmakers co-investing in its most expensive product line; Intel, which reinforces its foundry ambitions with a timing edge; TSMC and Samsung, which secure priority access to the equipment they need and shape the standards around it.

The loser is China’s semiconductor self-sufficiency project. Not because it cannot build chips — Chinese firms are making real progress on mature nodes — but because the frontier is moving away from anything China can reach through localization alone. The technology gap is no longer about a single machine. It is about an entire manufacturing architecture that requires trans-Pacific and trans-Atlantic coordination to replicate.

Global buyers of advanced chips will benefit from continued performance gains. But they will also inherit a bifurcated supply chain: one track servicing China and its allies, another servicing the rest of the world. The two tracks will run on different standards, with different equipment, different mask sizes, and increasingly different software toolchains.

What Comes Next

The immediate question is whether other players will join the High-NA standard. AMD and NVIDIA design chips that will run on these nodes, but they are not yet part of the mask consortium. Their absence leaves a gap — chip design and chip manufacturing are increasingly interdependent, and a standard without its primary customers is fragile.

Japan and the Netherlands face political pressure to maintain export controls, but domestic industry groups on both sides have lobbied for greater flexibility. If any of the quartet’s suppliers pull back on restrictions, the technical barrier softens.

China’s response remains the biggest variable. The country has shown a capacity for rapid catch-up in mature nodes and in areas where it can concentrate resources — solar, batteries, EVs. Whether it can replicate that trajectory in advanced lithography, against a coalition actively designing around its absence, is an open question. The answer will determine whether the chip Cold War settles into a durable divide or remains contested for decades.

For now, the wall is being built one 12-inch mask at a time.