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Samsung Bets on ASML's EUV to Leapfrog Rivals in DRAM

Samsung plans to deploy ASML's High-NA EUV lithography in DRAM production by 2028 — the first in the industry. The move signals a bid to close the gap with SK Hynix in AI-memory and tests whether ASML can deliver at scale.

  • Samsung
  • AI Hardware
  • DRAM Memory
  • ASML Lithography
  • Semiconductor Chip

A Memory Player Goes Into the Deep End

Samsung has a plan to use ASML’s most advanced lithography tool in DRAM by 2028 — and it intends to be the first company in the world to do so. The announcement, reported by Herald Economic on September 8, is framed as a routine partnership update. It is not routine.

The High-NA EUV scanner is ASML’s flagship machine, and it has already been assigned to the hardest jobs: leading-edge logic chips for AI accelerators. Samsung is now trying to pull it into memory fabrication, a domain where cost per bit matters more than raw performance. That is a bold pivot.

Why the Mask Size Matters

To understand the play, start with the mask.

Photomasks are the stencils that project circuit patterns onto silicon wafers during lithography. Until now, the industry has relied on 6-inch masks. Samsung is joining ASML’s Large Size Mask Consortium, which aims to switch to 12-inch masks for next-generation tools. The reason is mechanical, not glamorous: 12-inch masks let you print a larger pattern on a single piece of glass, eliminating the stitching steps needed when you have to tile smaller areas together. Stitching is where defects creep in.

Samsung’s stated rationale is straightforward — fewer seams, higher throughput, lower cost per chip. But the strategic implication runs deeper. A company that controls the mask standard early does not just benefit from better yields; it shapes the supply chain around those standards. Samsung’s deep experience with EUV over the past decade makes it the natural anchor for this transition, and the consortium is effectively a mechanism to lock in that advantage.

The Real Target Is SK Hynix

Here is the part English-language coverage tends to miss: Samsung is chasing SK Hynix, and it has been for years.

SK Hynix dominates the high-bandwidth memory (HBM) segment that powers the biggest AI trainers. Samsung has lagged in HBM yield and density, and every quarter of lost market share narrows its ability to invest in the next generation of process nodes. By committing to High-NA EUV for DRAM production by 2028 — before any rival memory maker has matched the move — Samsung is signaling that it will not cede the AI-memory ground without a fight.

The timing is deliberate. High-NA EUV enables smaller feature sizes on memory cells, which translates directly into higher density. For DRAM — and especially for the HBM stacks that depend on dense, well-yielded memory dies — that density advantage is the difference between supplying Nvidia’s next GPU or losing the bid to SK Hynix.

Who Wins, Who Loses

Samsung wins if the machines arrive on schedule and the yield curve is steep enough. The High-NA EUV has been in limited production at TSMC and Intel, but those are logic fabs, not memory fabs. Memory manufacturing has different priorities: through-put, defect density, and cost-per-gigabyte. No one has proven that High-NA EUV can deliver those metrics at scale in DRAM. Samsung is volunteering to prove it first.

SK Hynix loses the most if the play works. The Korean rival would face a competitor that has leapfrogged its own DRAM roadmap — not by incremental improvement, but by jumping to a more expensive and unproven process. SK Hynix would then have to respond, likely by accelerating its own High-NA EUV adoption, which means competing on ASML’s constrained delivery schedule.

ASML wins regardless, but with a caveat. The company is the sole producer of High-NA EUV tools, and demand already exceeds its ability to deliver. Every new application — especially one in memory, where the economics are tighter — increases pressure on ASML to expand capacity. If Samsung hits its 2028 target, it validates ASML’s roadmap. If it stumbles, it raises questions about whether the tools can handle memory fab environments.

The Delicate Partnership

The press release features quotes from both Samsung’s VP of foundry and memory operations and ASML CEO Christophe Fuquet, both of which read like polished partnership testimonials. The substance is in the details behind the language: Samsung and ASML are jointly developing mask standards, co-investigating process integration, and coordinating equipment delivery schedules. This is deeper collaboration than a standard vendor relationship — it is co-dependence.

Samsung’s earlier public meetings with Fuquet at Zeiss in Oberkochen suggest a personal dimension as well. The Lithography Alliance — the entity that governs EUV standards — is a technical body; the Samsung-ASML relationship has a leadership layer that goes beyond committees. That explains why Samsung can credibly claim it will be first, and why ASML is willing to back it publicly.

What Comes Next

Several outcomes are worth tracking.

First, the mask consortium. If 12-inch masks become the standard for next-gen DRAM, any memory manufacturer without early access — or the capital to redesign its lithography workflow — will face a structural cost disadvantage. Samsung is positioning itself inside that standard from the start.

Second, the equipment timeline. High-NA EUV tools are scarce. ASML’s backlog is long, and Samsung’s Foundry business already competes with memory for tool allocations. Whether Samsung can secure enough scanners for both foundry and memory fabs by 2028 remains an open question.

Third, the competitive response. If Samsung delivers on its promise, expect SK Hynix to accelerate its own High-NA EUV plans for DRAM — or to push harder on alternative process innovations such as GAA (gate-all-around) memory architectures. The memory chip war is entering a phase where lithography determines the pace, not just yield.

The Unwritten Stake

The broader story here is not about masks or microscopes. It is about who defines the rules of the next generation of memory. Samsung is not simply buying equipment. It is trying to anchor a new standard — 12-inch masks, High-NA EUV in DRAM, joint process development — in a way that makes it hard for rivals to follow at the same speed.

If that works, Samsung reclaims initiative in a segment where it has been defensively positioned. If it fails, it has spent heavily on tools that another competitor can adopt on the secondhand market, or that ASML can redirect to other customers.

Either way, 2028 will tell. And the stakes are larger than any single fab.