How the EUV Blockade Is Flipping the Semiconductor Power Game

The EUV chokehold is working — and that’s the real story

China has been cut off from the most advanced semiconductor lithography equipment since 2019, when the U.S. pressured the Netherlands to stop renewing ASML’s export licenses for EUV tools. The policy was tightened further in 2023 to include some advanced DUV equipment. The result is a widening technology gap that is becoming impossible to ignore.

While Chinese chipmakers like SMIC and Huawei continue producing at the cutting edge of what DUV can achieve — using multi-patterning techniques to squeeze more out of older machines — the math is working against them. Each additional lithography step adds cost, reduces yield, and eats into margins. That was never a sustainable path to keeping pace, and the latest moves from ASML’s biggest customers make that clear.

Samsung, TSMC, and Intel are building the next fence

On September 8, ASML announced cooperative plans with all three of its most important customers around two frontiers: High NA EUV lithography and the transition from 6-inch to 12-inch photomasks. This is not a routine supply chain update. It is a coordinated effort to lock in the next manufacturing standard before anyone else can catch up.

Intel is already using High NA EUV in some production steps for its latest PC processors. Samsung targets 2028 for High NA in DRAM manufacturing — the first memory maker to do so. TSMC plans to introduce it for leading-edge foundry processes starting in 2030. SK Hynix is pursuing the same 2028 DRAM timeline and has already received a production-grade High NA EUV tool at its M16 fab in Icheon, according to a company representative who confirmed discussions about joining ASML’s mask consortium.

The timing is deliberate. Memory prices peaked during the current supply shortage, but the industry expects a turning point around 2028 as new capacity comes online. When prices fall, the competitive advantage shifts from volume to cost per unit. Samsung’s bet on High NA EUV for DRAM is not primarily about making smaller transistors — it is about reducing the number of lithography steps required, which directly lowers the cost of each chip. In a commodity business, that is the difference between profit and loss.

The 12-inch mask is the quieter revolution

Most coverage focuses on the lithography tool itself. The mask transition is where the real ecosystem lock-in happens.

For decades, the photomask standard has been 6 inches. High NA EUV can work with existing 6-inch masks, but its smaller exposure area means large chips require stitching — printing sections separately and aligning them later. A 12-inch mask eliminates much of that complexity. ASML estimates productivity gains of up to 40 percent once the larger mask system is in place.

But changing the mask size is not something ASML or any single fab can do alone. It requires a complete retooling of the supply chain: mask makers, materials suppliers, inspection equipment, factory automation systems, and design software. Samsung is participating in ASML-led consortia for this transition. TSMC is pursuing industry-wide cooperation. Intel has been involved for years. China is not at the table.

ASML’s roadmap calls for a 12-inch mask pilot line by 2031 and full production use in advanced processes by 2033. That means the ecosystem will be built around the standards these three companies help define — and China will be working from a distance.

China’s dilemma: catch up or break away

China is not idle. FT reported that the country is accelerating domestic lithography development around Huawei, and Chinese-made DUV tools are still in testing phases at SMIC and Huawei. But those tools are generations behind what ASML produces. The gap is not closing — it is expanding.

The paradox of export controls is that they also create incentives for the banned country to go it alone. Every restriction makes Chinese independence more urgent. The question is whether that urgency translates into capability fast enough to matter before the High NA and 12-inch mask standards become irreversible.

American officials have long argued that blocking China’s access to advanced equipment buys time for allied companies to cement their lead. The September announcements suggest that strategy is working as intended — Samsung, TSMC, and Intel are not just buying tools, they are co-designing the next manufacturing era with ASML, and China is being excluded from the conversation.

Who wins, who loses, and what comes next

ASML wins by deepening its strategic importance. It is no longer just a equipment vendor — it is the architect of a new manufacturing standard that the world’s largest chipmakers are building around. Its position as the sole producer of EUV tools gives it leverage that no other company in the semiconductor chain can match.

Samsung and Intel gain a cost advantage in the memory downturn that begins around 2028. TSMC gains a first-mover edge in the foundry leading edge through 2030. Together, they create an ecosystem that is difficult for late entrants to join.

China loses access to the tools it needs and faces a growing gap that may become structurally permanent — unless domestic lithography breakthroughs come faster than anyone expects. The risk for Washington is that the blockade pushes Beijing toward a self-sufficient chip industry that no longer depends on Western supply chains. That scenario would only accelerate if American allies perceive the controls as effective and maintain coordination.

The semiconductor industry has always moved in generations. The current one is being defined not by who can print the smallest feature, but by who controls the infrastructure around that capability. The EUV blockade changed the playing field. The High NA and 12-inch mask transitions are changing the game itself.